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David Kung
David Kung
Bestätigte E-Mail-Adresse bei us.ibm.com
Titel
Zitiert von
Zitiert von
Jahr
Three dimensional integrated circuit
SM Alam, IM Elfadel, KW Guarini, M Ieong, PN Kudva, DS Kung, MA Lavin, ...
US Patent 7,312,487, 2007
3542007
Three dimensional integrated circuit and method of design
SM Alam, IM Elfadel, KW Guarini, M Ieong, PN Kudva, DS Kung, MA Lavin, ...
US Patent 7,723,207, 2010
2642010
Pushing ASIC performance in a power envelope
R Puri, L Stok, J Cohn, D Kung, D Pan, D Sylvester, A Srivastava, ...
Proceedings of the 40th annual Design Automation Conference, 788-793, 2003
2172003
Timing-driven global placement based on geometry-aware timing budgets
JD Cho, DS Kung
US Patent 6,480,991, 2002
1502002
Codenet: A large-scale ai for code dataset for learning a diversity of coding tasks
R Puri, DS Kung, G Janssen, W Zhang, G Domeniconi, V Zolotov, J Dolby, ...
arXiv preprint arXiv:2105.12655, 2021
1422021
Integrated circuit logic with self compensating block delays
P Gupta, FL Heng, DS Kung, DL Ostapko
US Patent 7,084,476, 2006
1102006
Blueconnect: Decomposing all-reduce for deep learning on heterogeneous network hierarchy
M Cho, U Finkler, D Kung, H Hunter
Proceedings of Machine Learning and Systems 1, 241-251, 2019
1042019
Booledozer: Logic synthesis for asics
L Stok, DS Kung, D Brand, AD Drumm, AJ Sullivan, LN Reddy, N Hieter, ...
IBM Journal of Research and Development 40 (4), 407-430, 1996
1001996
An integrated environment for technology closure of deep-submicron IC designs
L Trevillyan, D Kung, R Puri, LN Reddy, MA Kazda
IEEE Design & Test of Computers 21 (1), 14-22, 2004
942004
Hazard-non-increasing gate-level optimization algorithms
Kung
1992 IEEE/ACM International Conference on Computer-Aided Design, 631-634, 1992
921992
Project codenet: A large-scale ai for code dataset for learning a diversity of coding tasks
R Puri, DS Kung, G Janssen, W Zhang, G Domeniconi, V Zolotov, J Dolby, ...
arXiv preprint arXiv:2105.12655 1035, 2021
772021
Powerai ddl
M Cho, U Finkler, S Kumar, D Kung, V Saxena, D Sreedhar
arXiv preprint arXiv:1708.02188, 2017
772017
Gate-size selection for standard cell libraries
F Beeftink, P Kudva, D Kung, L Stok
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided …, 1998
591998
Clock tree distribution generation by determining allowed placement regions for clocked elements
WR Migatz, PM Campbell, DJ Hathaway, DS Kung, R Puri, LH Trevillyan
US Patent 7,225,421, 2007
532007
Minimizing power with flexible voltage islands
R Puri, D Kung, L Stok
2005 IEEE International Symposium on Circuits and Systems, 21-24, 2005
482005
A fast fanout optimization algorithm for near-continuous buffer libraries
DS Kung
Proceedings of the 35th annual Design Automation Conference, 352-355, 1998
411998
Blueconnect: Novel hierarchical all-reduce on multi-tired network for deep learning
M Cho, U Finkler, D Kung
Proceedings of the 2nd SysML Conference, 2019
402019
Optimal P/N width ratio selection for standard cell libraries
DS Kung, R Puri
1999 IEEE/ACM International Conference on Computer-Aided Design. Digest of …, 1999
401999
Distributed deep learning strategies for automatic speech recognition
W Zhang, X Cui, U Finkler, B Kingsbury, G Saon, D Kung, M Picheny
ICASSP 2019-2019 IEEE International Conference on Acoustics, Speech and …, 2019
362019
Combinatorial cell design for CMOS libraries
F Beeftink, P Kudva, DS Kung, R Puri, L Stok
Integration 29 (1), 67-93, 2000
282000
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